X001H001APID APID 1 Packet ID Application ID TE X001H001CNT APID 1 Packet Sequence Control Source Sequence Count TE X001H001PCKT APID 1 Packet ID Type TE X001H001PLEN APID 1 Packet Length TE X001H001PVNO APID 1 Packet ID Version Number TE X001H001SECONDS APID 1 System Time TE X001H001SEGF APID 1 Packet Sequence Control Segmentation Flag TE X001H001SHDF APID 1 Packet ID Secondary Header Flag TE X001H001SUBSECS APID 1 System Time Subseconds TE X001H001TIME APID 1 System Time when packet was formed TE X001IACCEL Accelerometer Amplitude (peak-to-peak) TE X001IACTLOCK Shutter Lock-down Status TE X001IACTSELECT Actuator Selected TE X001IACTSHUTTER1Shutter 1 Position TE X001IACTSHUTTER2Shutter 2 Position TE X001IACTSTATE Actuator State / Attenuator State TE X001IACTSWITCH Actuator Switch Readback TE X001IACTTENSION1Shutter 1 Tension Status TE X001IACTTENSION2Shutter 2 Tension Status TE X001IACTTIME Actuation Time in Seconds TE X001IACTVALVE Valve Status TE X001IADP_ACSCODEACS code TE X001IADP_ADPTESTIADP_SWMD: ADP test pattern (linear ramp) TE X001IADP_BOOTREGIADP_SWSTAT: Page of boot EEPROM (register) TE X001IADP_BOOTVARIADP_SWSTAT: Page of boot EEPROM (variable) TE X001IADP_DSPSVC1Checksum of ADP program (after ADPRESET; changes when ADP runnTE X001IADP_ERRCTR ADP Total Error Count TE X001IADP_ES IADP_SWSTAT: ES signal TE X001IADP_ESCTR Number of ES (Earthshine) signals TE X001IADP_FIFOEMPIADP_SWSTAT: ADP FIFO empty TE X001IADP_FIFOFULIADP_SWSTAT: ADP FIFO Full TE X001IADP_FPGAV ADP-to-IDPU Interface Voltage TE X001IADP_FRMSX Number of discarded frames TE X001IADP_HWMD ADP Hardware Mode TE X001IADP_ICR ADP Interface Control Register Read Back TE X001IADP_INTCTR Number of communication interrupts (ADP/IDPU) TE X001IADP_IOWAIT IADP_SWMD: Include I/O wait state TE X001IADP_LIMBS Number of SAS limbs above threshold TE X001IADP_LIMBX Number of discarded limbs( 5bit/SAS) TE X001IADP_MODE ADP Controls [PwrAct,PwrSense,SAS,SOH] TE X001IADP_P5D1V DSP Voltage TE X001IADP_P5D2V EEPROM Voltage TE X001IADP_P5D3V ADP-to-SAS/RAS Interface Voltage TE X001IADP_PARAREGIADP_SWSTAT: Page of parameter EEPROM (register) TE X001IADP_PARAVARIADP_SWSTAT: Page of parameter EEPROM (variable) TE X001IADP_PER ADP Power Overcurrent Bits Read Back TE X001IADP_PKTCTR Number of packets written to FIFO TE X001IADP_PTID Parameter Table ID TE X001IADP_PWR ADP Power Command [DSP,S3,S2,S1,RAS] TE X001IADP_PWR_DSPADP Commanded DSP Power TE X001IADP_PWR_RASADP Commanded RAS Power TE X001IADP_PWR_SASADP Commanded SAS 1 Power TE X001IADP_PWR_SASADP Commanded SAS 2 Power TE X001IADP_PWR_SASADP Commanded SAS 3 Power TE X001IADP_RADJTHRIADP_HWMD: Enable RAS threshold table TE X001IADP_RASACTINumber of acquired RAS images TE X001IADP_RASETYPIADP_SWMD: Enable RAS time events TE X001IADP_RASEV IADP_SWMD: RAS events TE X001IADP_RASEVTSNumber of RAS events TE X001IADP_RASFRMSNumber of RAS frames (interrupts) TE X001IADP_RASIM IADP_SWMD: RAS images TE X001IADP_RASM IADP_HWMD: RAS 1st level mode TE X001IADP_RASNTYPIADP_SWMD: Enable n-pixel type of RAS events TE X001IADP_RASPXLSNumber of RAS pixels above threshold TE X001IADP_RASSIM IADP_SWMD: RAS spatial summed images TE X001IADP_RASTMEMIADP_HWMD: Enable time memory TE X001IADP_RASX IADP_FRMSX: Number of discarded RAS frames TE X001IADP_RETRY ADP Retry Count TE X001IADP_RSSUM IADP_HWMD: Enable spatial summation TE X001IADP_RTSUM IADP_HWMD: Enable time summation TE X001IADP_SAS10LINumber of SAS10 limbs TE X001IADP_SAS10M IADP_HWMD: SAS 10 1st level mode TE X001IADP_SAS11LINumber of SAS11 limbs TE X001IADP_SAS11M IADP_HWMD: SAS 11 1st level mode TE X001IADP_SAS12LINumber of SAS12 limbs TE X001IADP_SAS12M IADP_HWMD: SAS 12 1st level mode TE X001IADP_SASFRMSNumber of SAS frames (interrupts) TE X001IADP_SASIM IADP_SWMD: SAS 10bit images TE X001IADP_SASIM8 IADP_SWMD: SAS 8bit images TE X001IADP_SASLI IADP_SWMD: SAS 10bit limbs TE X001IADP_SASLI8 IADP_SWMD: SAS 8bit limbs TE X001IADP_SASSEC IADP_SWMD: SAS, every second pixel TE X001IADP_SASX IADP_FRMSX: Number of discarded SAS frames TE X001IADP_SCAD IADP_SWSTAT: SAS cadency TE X001IADP_SENSE ADP Power Readback [DSP,S3,S2,S1,RAS] TE X001IADP_SENSE_DADP Readback DSP Power TE X001IADP_SENSE_RADP Readback RAS Power TE X001IADP_SENSE_SADP Readback SAS 1 Power TE X001IADP_SENSE_SADP Readback SAS 2 Power TE X001IADP_SENSE_SADP Readback SAS 3 Power TE X001IADP_STAT_POADP Power Status TE X001IADP_STAT_READP Read Status TE X001IADP_STAT_SAADP Safed Status TE X001IADP_STAT_WRADP Write Status TE X001IADP_STATUS ADP Status [Safed,PwrErr,WrtErr,RdErr] TE X001IADP_STOPPEDIADP_SWSTAT: ADP stopped data taking TE X001IADP_SWMD ADP Software Mode TE X001IADP_SWSTAT ADP software status --- see note 6 TE X001IATTALLOC1 Attenuator Allocation #1 (Cycles) TE X001IATTALLOC2 Attenuator Allocation #2 (Cycles) TE X001IATTEND Attenuator End Time (in 1/16 sec) TE X001IATTFLUX FLUX VALUE USED FOR ATTEN DECISION TE X001IATTLEVEL Attenuation Level Recommended (00:Open,11=Full) TE X001IATTRECMOVE Attenuator Recommended Move TE X001IATTSTART Attenuator Start Time (in 1/16 sec) TE X001IATTT Attenuator Actuator Temperature Monitor TE X001IAVGLIVE AVERAGE DETECTOR LIVE TIME (4 GEDs) TE X001IBCF_CTRL_ADADC Overcurrent Bus Ctrl Stat Rdbk TE X001IBCF_CTRL_ADADC Signal Bus Ctrl Stat Rdbk TE X001IBCF_CTRL_ADADC Trip Bus Ctrl Stat Rdbk TE X001IBCF_CTRL_CMCommands Bus Ctrl Stat Rdbk TE X001IBCF_CTRL_FRFast Rates Bus Ctrl Stat Rdbk TE X001IBCF_CTRL_MRMonitor Rates Bus Ctrl Stat Rdbk TE X001IBCF_CTRL_PAParity Bus Ctrl Stat Rdbk TE X001IBCF_CTRL_RDBus Control Status Readback TE X001IBCF_CTRL_ROROM Bus Ctrl Stat Rdbk TE X001ICP1T Cold Plate Temperature Monitor #1 TE X001ICP2T Cold Plate Temperature Monitor #2 TE X001ICPCT CPC Temperature Monitor TE X001ICPHTR1 ColdPlate Heater Voltage Monitor 1 TE X001ICPHTR2 ColdPlate Heater Voltage Monitor 2 TE X001ICPHTR3 ColdPlate Heater Voltage Monitor 3 TE X001ICPPWR ColdPlate Heater Power TE X001ICPSETPT ColdPlate Temperature Set Point TE X001ICRYOBAL CryoCooler Balancer Power Level TE X001ICRYOMAIN CryoCooler Main Power Level Commanded TE X001ICRYOPHASE CryoCooler Balancer Phase TE X001ICRYOWAVE CryoCooler Balancer Waveform Code TE X001ICT1T Cold Tip Temperature Monitor #1 TE X001ICT2T Cold Tip Temperature Monitor #2 TE X001ICTR_CTRL Counter Ctrl [adc, dma, mon, fast] TE X001IDIB1_AFEPWRAFE Power TE X001IDIB1_FRONTDFront Decimator TE X001IDIB1_M12I DIB#1 -12 Current Monitor TE X001IDIB1_M12V DIB#1 -12 Voltage Monitor TE X001IDIB1_M5I DIB#1 -5 Current Monitor TE X001IDIB1_M5V DIB#1 -5 Voltage Monitor TE X001IDIB1_OVERCUOvercurrent TE X001IDIB1_P12I DIB#1 +12 Current Monitor TE X001IDIB1_P12V DIB#1 +12 Voltage Monitor TE X001IDIB1_P5I DIB#1 +5 Current Monitor TE X001IDIB1_P5V DIB#1 +5 Voltage Monitor TE X001IDIB1_REARDERear Decimator TE X001IDIB1_SDENABShutDown Enable TE X001IDIB1_SHUTDOShutDown 1 TE X001IDIB1_SHUTDOShutDown 2 TE X001IDIB1_STATUSDIB#1 STATUS See Note 1 TE X001IDIB1_TESTPUTest Pulser TE X001IDIB2_AFEPWRAFE Power TE X001IDIB2_FRONTDFront Decimator TE X001IDIB2_M12I DIB#2 -12 Current Monitor TE X001IDIB2_M12V DIB#2 -12 Voltage Monitor TE X001IDIB2_M5I DIB#2 -5 Current Monitor TE X001IDIB2_M5V DIB#2 -5 Voltage Monitor TE X001IDIB2_OVERCUOvercurrent TE X001IDIB2_P12I DIB#2 +12 Current Monitor TE X001IDIB2_P12V DIB#2 +12 Voltage Monitor TE X001IDIB2_P5I DIB#2 +5 Current Monitor TE X001IDIB2_P5V DIB#2 +5 Voltage Monitor TE X001IDIB2_REARDERear Decimator TE X001IDIB2_SDENABShutDown Enable TE X001IDIB2_SHUTDOShutDown 1 TE X001IDIB2_SHUTDOShutDown 2 TE X001IDIB2_STATUSDIB#2 STATUS TE X001IDIB2_TESTPUTest Pulser TE X001IDIB3_AFEPWRAFE Power TE X001IDIB3_FRONTDFront Decimator TE X001IDIB3_M12I DIB#3 -12 Current Monitor TE X001IDIB3_M12V DIB#3 -12 Voltage Monitor TE X001IDIB3_M5I DIB#3 -5 Current Monitor TE X001IDIB3_M5V DIB#3 -5 Voltage Monitor TE X001IDIB3_OVERCUOvercurrent TE X001IDIB3_P12I DIB#3 +12 Current Monitor TE X001IDIB3_P12V DIB#3 +12 Voltage Monitor TE X001IDIB3_P5I DIB#3 +5 Current Monitor TE X001IDIB3_P5V DIB#3 +5 Voltage Monitor TE X001IDIB3_REARDERear Decimator TE X001IDIB3_SDENABShutDown Enable TE X001IDIB3_SHUTDOShutDown 1 TE X001IDIB3_SHUTDOShutDown 2 TE X001IDIB3_STATUSDIB#3 STATUS TE X001IDIB3_TESTPUTest Pulser TE X001IDIB4_AFEPWRAFE Power TE X001IDIB4_FRONTDFront Decimator TE X001IDIB4_M12I DIB#4 -12 Current Monitor TE X001IDIB4_M12V DIB#4 -12 Voltage Monitor TE X001IDIB4_M5I DIB#4 -5 Current Monitor TE X001IDIB4_M5V DIB#4 -5 Voltage Monitor TE X001IDIB4_OVERCUOvercurrent TE X001IDIB4_P12I DIB#4 +12 Current Monitor TE X001IDIB4_P12V DIB#4 +12 Voltage Monitor TE X001IDIB4_P5I DIB#4 +5 Current Monitor TE X001IDIB4_P5V DIB#4 +5 Voltage Monitor TE X001IDIB4_REARDERear Decimator TE X001IDIB4_SDENABShutDown Enable TE X001IDIB4_SHUTDOShutDown 1 TE X001IDIB4_SHUTDOShutDown 2 TE X001IDIB4_STATUSDIB#4 STATUS TE X001IDIB4_TESTPUTest Pulser TE X001IDIB5_AFEPWRAFE Power TE X001IDIB5_FRONTDFront Decimator TE X001IDIB5_M12I DIB#5 -12 Current Monitor TE X001IDIB5_M12V DIB#5 -12 Voltage Monitor TE X001IDIB5_M5I DIB#5 -5 Current Monitor TE X001IDIB5_M5V DIB#5 -5 Voltage Monitor TE X001IDIB5_OVERCUOvercurrent TE X001IDIB5_P12I DIB#5 +12 Current Monitor TE X001IDIB5_P12V DIB#5 +12 Voltage Monitor TE X001IDIB5_P5I DIB#5 +5 Current Monitor TE X001IDIB5_P5V DIB#5 +5 Voltage Monitor TE X001IDIB5_REARDERear Decimator TE X001IDIB5_SDENABShutDown Enable TE X001IDIB5_SHUTDOShutDown 1 TE X001IDIB5_SHUTDOShutDown 2 TE X001IDIB5_STATUSDIB#5 STATUS TE X001IDIB5_TESTPUTest Pulser TE X001IDIB6_AFEPWRAFE Power TE X001IDIB6_FRONTDFront Decimator TE X001IDIB6_M12I DIB#6 -12 Current Monitor TE X001IDIB6_M12V DIB#6 -12 Voltage Monitor TE X001IDIB6_M5I DIB#6 -5 Current Monitor TE X001IDIB6_M5V DIB#6 -5 Voltage Monitor TE X001IDIB6_OVERCUOvercurrent TE X001IDIB6_P12I DIB#6 +12 Current Monitor TE X001IDIB6_P12V DIB#6 +12 Voltage Monitor TE X001IDIB6_P5I DIB#6 +5 Current Monitor TE X001IDIB6_P5V DIB#6 +5 Voltage Monitor TE X001IDIB6_REARDERear Decimator TE X001IDIB6_SDENABShutDown Enable TE X001IDIB6_SHUTDOShutDown 1 TE X001IDIB6_SHUTDOShutDown 2 TE X001IDIB6_STATUSDIB#6 STATUS TE X001IDIB6_TESTPUTest Pulser TE X001IDIB7_AFEPWRAFE Power TE X001IDIB7_FRONTDFront Decimator TE X001IDIB7_M12I DIB#7 -12 Current Monitor TE X001IDIB7_M12V DIB#7 -12 Voltage Monitor TE X001IDIB7_M5I DIB#7 -5 Current Monitor TE X001IDIB7_M5V DIB#7 -5 Voltage Monitor TE X001IDIB7_OVERCUOvercurrent TE X001IDIB7_P12I DIB#7 +12 Current Monitor TE X001IDIB7_P12V DIB#7 +12 Voltage Monitor TE X001IDIB7_P5I DIB#7 +5 Current Monitor TE X001IDIB7_P5V DIB#7 +5 Voltage Monitor TE X001IDIB7_REARDERear Decimator TE X001IDIB7_SDENABShutDown Enable TE X001IDIB7_SHUTDOShutDown 1 TE X001IDIB7_SHUTDOShutDown 2 TE X001IDIB7_STATUSDIB#7 STATUS TE X001IDIB7_TESTPUTest Pulser TE X001IDIB8_AFEPWRAFE Power TE X001IDIB8_FRONTDFront Decimator TE X001IDIB8_M12I DIB#8 -12 Current Monitor TE X001IDIB8_M12V DIB#8 -12 Voltage Monitor TE X001IDIB8_M5I DIB#8 -5 Current Monitor TE X001IDIB8_M5V DIB#8 -5 Voltage Monitor TE X001IDIB8_OVERCUOvercurrent TE X001IDIB8_P12I DIB#8 +12 Current Monitor TE X001IDIB8_P12V DIB#8 +12 Voltage Monitor TE X001IDIB8_P5I DIB#8 +5 Current Monitor TE X001IDIB8_P5V DIB#8 +5 Voltage Monitor TE X001IDIB8_REARDERear Decimator TE X001IDIB8_SDENABShutDown Enable TE X001IDIB8_SHUTDOShutDown 1 TE X001IDIB8_SHUTDOShutDown 2 TE X001IDIB8_STATUSDIB#8 STATUS TE X001IDIB8_TESTPUTest Pulser TE X001IDIB9_AFEPWRAFE Power TE X001IDIB9_FRONTDFront Decimator TE X001IDIB9_M12I DIB#9 -12 Current Monitor TE X001IDIB9_M12V DIB#9 -12 Voltage Monitor TE X001IDIB9_M5I DIB#9 -5 Current Monitor TE X001IDIB9_M5V DIB#9 -5 Voltage Monitor TE X001IDIB9_OVERCUOvercurrent TE X001IDIB9_P12I DIB#9 +12 Current Monitor TE X001IDIB9_P12V DIB#9 +12 Voltage Monitor TE X001IDIB9_P5I DIB#9 +5 Current Monitor TE X001IDIB9_P5V DIB#9 +5 Voltage Monitor TE X001IDIB9_REARDERear Decimator TE X001IDIB9_SDENABShutDown Enable TE X001IDIB9_SHUTDOShutDown 1 TE X001IDIB9_SHUTDOShutDown 2 TE X001IDIB9_STATUSDIB#9 STATUS TE X001IDIB9_TESTPUTest Pulser TE X001IDPU_12I +/-12 Current Monitor from the IPC TE X001IDPU_15I +15 Current Monitor from the IPC TE X001IDPU_5DI +5D Current Monitor from the IPC TE X001IDPU_5I +/-5 Current Monitor from the IPC TE X001IDPU_ACTV IDPU Actuator Voltage Monitor TE X001IDPU_CMDEXP Number of Commands Expected in a Command Uplink TE X001IDPU_CMDREG Command Register (Uplink Only, Not Internal) TE X001IDPU_CMDTOT Number of Commands Received and Executed TE X001IDPU_DUMPADRDump Address (DUMPADR) TE X001IDPU_ERRCODEError Code TE X001IDPU_ERRCTR Error Counter TE X001IDPU_ERRDATAError Data (Associated with Error Code) TE X001IDPU_FGND Foreground Availability TE X001IDPU_FSW Software Version Code TE X001IDPU_HDW Hardware Version Code (Ex=ETU,Fx=FLT) TE X001IDPU_HTRV IDPU Heater Voltage Monitor TE X001IDPU_LOADADRLoad Address (ADR) TE X001IDPU_M12V IDPU -12 Voltage Monitor TE X001IDPU_M5V IDPU -5 Voltage Monitor TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 0 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 1 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 10 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 11 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 12 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 13 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 14 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 15 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 16 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 17 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 18 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 19 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 2 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 20 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 21 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 22 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 23 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 24 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 25 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 26 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 27 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 28 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 29 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 3 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 30 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 31 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 4 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 5 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 6 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 7 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 8 TE X001IDPU_MEM_DUMIDPU Diagnostic Memory Dump Byte 9 TE X001IDPU_MODE Operating Mode (0-3) TE X001IDPU_P100V IDPU +100 Voltage Monitor TE X001IDPU_P12V IDPU +12 Voltage Monitor TE X001IDPU_P15V IDPU +15 Voltage Monitor TE X001IDPU_P28HV IDPU +28 HV Supply Monitor TE X001IDPU_P28HVI +28 HV Supply Current Monitor TE X001IDPU_P28SWV IDPU +28 Switched Voltage Monitor TE X001IDPU_P28V IDPU +28 Voltage Monitor TE X001IDPU_P5DRV IDPU +5D Regulated Voltage Monitor TE X001IDPU_P5DV IDPU +5 Digital Voltage Monitor TE X001IDPU_P5V IDPU +5 Voltage Monitor TE X001IDPU_RSTCTR Processor Reset Count TE X001IDPUT IDPU Temperature Monitor TE X001IENA_ACT Actuator Enable TE X001IENA_ADP ADP Power Enable TE X001IENA_ALE Attenuator Logic Enable TE X001IENA_ATT Attenuator Enable TE X001IENA_CP Cold Plate Heater Enable TE X001IENA_CPC Cryocooler Power Enable TE X001IENA_DEC Decimation Enable TE X001IENA_DIB DIB Power Enable (All 9) TE X001IENA_FLR Flare Script Controller Enable TE X001IENA_FRT Fast Rates Controller Enable TE X001IENA_HTR Heater Enable (UGT,LGT,RAS) TE X001IENA_PDHV Particle Detector HV Enable TE X001IENA_PMT PMT High Voltage Enable TE X001IENA_SPHV Spectrometer HV Enable TE X001IENA_SUN Sun/Shadow Detection and CMDS TE X001IENABLES HV and Power Enables TE X001IETR_CTRL Event Telemetry Disables (Copy of IO Port) TE X001IETR_CTRL_ADADP Event Telemetry Enable TE X001IETR_CTRL_DIDIB1 Event Telemetry Enable TE X001IETR_CTRL_DIDIB2 Event Telemetry Enable TE X001IETR_CTRL_DIDIB3 Event Telemetry Enable TE X001IETR_CTRL_DIDIB4 Event Telemetry Enable TE X001IETR_CTRL_DIDIB5 Event Telemetry Enable TE X001IETR_CTRL_DIDIB6 Event Telemetry Enable TE X001IETR_CTRL_DIDIB7 Event Telemetry Enable TE X001IETR_CTRL_DIDIB8 Event Telemetry Enable TE X001IETR_CTRL_DIDIB9 Event Telemetry Enable TE X001IHVDAC1 Detector High Voltage DAC Register #1 TE X001IHVDAC2 Detector High Voltage DAC Register #2 TE X001IHVDAC3 Detector High Voltage DAC Register #3 TE X001IHVDAC4 Detector High Voltage DAC Register #4 TE X001IHVDAC5 Detector High Voltage DAC Register #5 TE X001IHVDAC6 Detector High Voltage DAC Register #6 TE X001IHVDAC7 Detector High Voltage DAC Register #7 TE X001IHVDAC8 Detector High Voltage DAC Register #8 TE X001IHVDAC9 Detector High Voltage DAC Register #9 TE X001IHVMON1V HV supply #1 Voltage Monitor TE X001IHVMON2V HV supply #2 Voltage Monitor TE X001IHVMON3V HV supply #3 Voltage Monitor TE X001IHVMON4V HV supply #4 Voltage Monitor TE X001IHVMON5V HV supply #5 Voltage Monitor TE X001IHVMON6V HV supply #6 Voltage Monitor TE X001IHVMON7V HV supply #7 Voltage Monitor TE X001IHVMON8V HV supply #8 Voltage Monitor TE X001IHVMON9V HV supply #9 Voltage Monitor TE X001IHVPERIOD HV Stepping Period in seconds TE X001IHVTMPLMT HV Shutoff Temperature Limit TE X001ILGT1T Lower Grid Tray Temperature Monitor #1 TE X001ILGT2T Lower Grid Tray Temperature Monitor #2 TE X001ILGT3T Lower Grid Tray Temperature Monitor #3 TE X001ILGT4T Lower Grid Tray Temperature Monitor #4 TE X001ILGTHTRBV Backup Lower Grid Tray Heater Voltage Monitor TE X001ILGTHTRPV Primary Lower Grid Tray Heater Voltage Monitor TE X001ILGTPWR Lower Grid Tray Heater Power TE X001ILGTSETPT LGT Temperature Set Point TE X001IO_SPARE IO spare TE X001IPCT IPC Temperature Monitor TE X001IPD_CTRA Particle Detector Counter A TE X001IPD_CTRB Particle Detector Counter B TE X001IPDHVDAC Particle Detector High Voltage DAC Register TE X001IPDT Particle Detector Temperature Monitor TE X001IPDTHRESH Particle Detector Threshold TE X001IPF_CTRL_RD Packet Formatter Status Readback TE X001IPF_CTRL_TSRPF Timer Source TE X001IPF_ERR_ADPLPacket Formatter Error: ADP Long Pkt TE X001IPF_ERR_ADPMPacket Formatter Error: ADP Memory Full TE X001IPF_ERR_EVTLPacket Formatter Error: Event Long Pkt TE X001IPF_ERR_EVTMPacket Formatter Error: Event Memory Full TE X001IPF_ERR_FLNGPacket Formatter Error: Fast Long Pkt TE X001IPF_ERR_FMEMPacket Formatter Error: Fast Memory Full TE X001IPF_ERR_MONLPacket Formatter Error: Mon Long Pkt TE X001IPF_ERR_MONMPacket Formatter Error: Mon Memory Full TE X001IPF_ERR_RD Packet Formatter Errors TE X001IPMT_CTRL PMT Control Byte TE X001IPMT_HVREQ PMT High Voltage Request Register TE X001IPWM_CP Cold Plate Heater Enables TE X001IPWM_LGT Lower Grid Tray Heater Enable bits TE X001IPWM_RAS RAS Heater Enable TE X001IPWM_UGT Upper Grid Tray Heater Enable bits TE X001IPWMMODE Enables [R,CCC,LL,UU] TE X001IPWR_CPCTRIPCPC Status TE X001IPWR_HV28ON 28 V High Voltage On/Off TE X001IPWR_HV28TRI28 V High Voltage Status TE X001IPWRSTATUS Power Ctrl Misc [hv28on,cpctrip,hv28trip] TE X001IRAD1T CryoCooler Instrument Ring TE X001IRAD2T CryoCooler Heat Reject Collar Temperature TE X001IRAS1T RAS Temperature Monitor #1- Box TE X001IRAS2T RAS Temperature Monitor #2 - CCD TE X001IRAS_P12V RAS +12V TE X001IRAS_P15V RAS +15V (Regulated on ADP to 14V for CCD) TE X001IRAS_P5V RAS +5V TE X001IRAS_P5VD RAS +5V Digital TE X001IRASHTRV RAS Heater Voltage Monitor TE X001IRASPWR RAS Heater Power TE X001IRASSETPT RAS Temperature Set Point TE X001ISAA_FLUX SAA Flux Calculation TE X001ISAA_THRESH SAA Flux Threshold Setting TE X001ISAA_WINDOW SAA Enable Window TE X001ISAS1_P12V SAS1 +12V TE X001ISAS1_P15V SAS1 +15V TE X001ISAS1_P5V SAS1 +5V TE X001ISAS1_P5VD SAS1 +5V Digital TE X001ISAS2_P12V SAS2 +12V TE X001ISAS2_P15V SAS2 +15V TE X001ISAS2_P5V SAS2 +5V TE X001ISAS2_P5VD SAS2 +5V Digital TE X001ISAS3_P12V SAS3 +12V TE X001ISAS3_P15V SAS3 +15V TE X001ISAS3_P5V SAS3 +5V TE X001ISAS3_P5VD SAS3 +5V Digital TE X001ISC_ACS Spacecraft ACS [InSun] TE X001ISC_CLOCK Spacecraft Clock TE X001ISC_POWER S/C Power[SsrRec,SsrPwr,Sw28,Cryo,IDPU,Heat] TE X001ISC_PWR_CRYOS/C Cryocooler Power TE X001ISC_PWR_HTR S/C Heater Power TE X001ISC_PWR_IDPUS/C IDPU Power TE X001ISC_PWR_SSR S/C SSR Power TE X001ISC_PWR_SSRRS/C SSR Record Indicator TE X001ISC_PWR_SW28S/C Switched Power TE X001ISC_SSR S/C SSR: 0=Empty, 255=Full TE X001ISC_TC S/C CMD: [Send,Lock,SendSSR,Xmit] TE X001ISC_TC_LOCK S/C CMD Lock TE X001ISC_TC_SENDCS/C CMD Send CPU TE X001ISC_TC_SENDSS/C CMD Send SSR TE X001ISC_TC_XMIT S/C CMD Transmit TE X001ISCI_STAT_PDParticle Detector A/B selection TE X001ISCI_STAT_SASAS Limit TE X001ISCI_STAT_SASouth Atlantic Anomaly TE X001ISCI_STAT_SUShadow or Sun TE X001ISCI_STAT_TM; lsb of ISCI_STATUS TE X001ISCI_STATUS SCI Status: [,saslimit,pdsel,sun,saa,tm] TE X001ITMHEADER0 Science Telemetry Header Byte 0 TE X001ITMHEADER1 Science Telemetry Header Byte 1 TE X001ITMHEADER2 Science Telemetry Header Byte 2 TE X001ITMHEADER3 Science Telemetry Header Byte 3 TE X001ITMHEADER4 Science Telemetry Header Byte 4 TE X001ITMHEADER5 Science Telemetry Header Byte 5 TE X001ITST Thermal Shield Temperature Monitor TE X001IUGT1T Upper Grid Tray Temperature Monitor #1 TE X001IUGT2T Upper Grid Tray Temperature Monitor #2 TE X001IUGT3T Upper Grid Tray Temperature Monitor #3 TE X001IUGT4T Upper Grid Tray Temperature Monitor #4 TE X001IUGTHTRBV Backup Upper Grid Tray Heater Voltage Monitor TE X001IUGTHTRPV Primary Upper Grid Tray Heater Voltage Monitor TE X001IUGTPWR Upper Grid Tray Heater Power TE X001IUGTSETPT UGT Temperature Set Point TE X001SPARE1 TE X001SPARE2 spare TE X001SPARE3 TE X001SPARE4 Spare TE X001SPARE5_SASY Spare TE X001SPARE6 Spare TE X001SPARE7 Spare TE X001TACESTSPINRTACS estimated spin rate TE X001TACINSUNSENSSun Sensor used by ACS (0 = FSS, 1 = SAS) TE X001TACSCMDMODE 0=autonomous mode, 1=commanded mode TE X001TACSCSSSPI ACS CSS Sun Presence indicator TE X001TACSCSSUF ACS Output Course Sun Sensor Unusual Flag TE X001TACSCSSX ACS CCS Sun vector along X-axis TE X001TACSCSSY ACS CCS Sun vector along Y-axis TE X001TACSCSSZ ACS CCS Sun vector along Z-axis TE X001TACSFLAGS1 ACS Flag Bits TE X001TACSFSSINSUNInput to ACS indicating FSS is detecting the sun. TE X001TACSFSSX ACS FSS Sun vector along X-axis TE X001TACSFSSY ACS FSS Sun vector along Y-axis TE X001TACSFSSZ ACS FSS Sun vector along Z-axis TE X001TACSMAGX ACS Magnetic field along X-axis TE X001TACSMAGY ACS Magnetic field along Y-axis TE X001TACSMAGZ ACS Magnetic field along Z-axis TE X001TACSMODE ACS current mode TE X001TACSSASSPI ACS SAS Sun Presence Indicator TE X001TACSSASX ACS SAS Sun vector along X-axis TE X001TACSSASY ACS SAS Sun vector along Y-axis TE X001TACSSASZ ACS SAS Sun vector along Z-axis TE X001TACTCERRORS # of ACS TCs that failed to execute TE X001TACTCRECVD # of ACS TCs received TE X001TACTCREJECT # of ACS TCs that failed verification TE X001TACTOIDLEFLGACS Flag describing transition to Idle Mode TE X001TACTQRXCUR ACS Commanded current to X torque rod TE X001TACTQRYCUR ACS Commanded current to Y torque rod TE X001TACTQRZCUR ACS Commanded current to Z torque rod TE X001TACTRANSVRTXACS Transverse rate along X-axis TE X001TACTRANSVRTYACS Transverse rate along Y-axis TE X001TADBIADSEL Which IAD device is selected; 0 = IAD#1, 1 = IAD#2 TE X001TADBIADXPHA Current command for the IADX Phase A TE X001TADBIADXPHB Current command for the IADX Phase B TE X001TADBIADYPHA Current command for the IADY Phase A TE X001TADBIADYPHB Current command for the IADY Phase B TE X001TADBPULSECNTThe IAD Pulse Count TE X001TADBSAPRI Solar array release primary bus command monitor TE X001TADBSASEC Solar array release secondary bus command monitor TE X001TADBSAXLOW Solar array release X-axis lower command monitor TE X001TADBSAXUP Solar array release X-axis upper command monitor TE X001TADBSAYLOW Solar array release Y-axis lower command monitor TE X001TADBSAYUP Solar array release Y-axis upper command monitor TE X001TADBSEPCOUNTThe current automated array release count TE X001TADBSTEPCNT The IAD step count TE X001TADBSTFSEP1 Filtered separation #1 input TE X001TADBSTFSEP2 Filtered separation #2 input TE X001TADBSTFSEP3 Filtered separation #3 input TE X001TADBSTOVERRDThree correct pulses occurred to start array release sequence TE X001TADBSTSEP1 Raw separation #1 input TE X001TADBSTSEP2 Raw separation #2 input TE X001TADBSTSEP3 Raw separation #3 input TE X001TADBUPCNT IAD rotation direction; 0 = counter clockwise, 1 = clockwise TE X001TADBXLPRI Status of X-axis lower primary array release TE X001TADBXLSEC Status of X-axis lower secondary array release TE X001TADBXUPRI Status of X-axis upper primary array release TE X001TADBXUSEC Status of X-axis upper secondary array release TE X001TADBYLPRI Status of Y-axis lower primary array release TE X001TADBYLSEC Status of Y-axis lower secondary array release TE X001TADBYUPRI Status of Y-axis upper primary array release TE X001TADBYUSEC Status of Y-axis upper secondary array release TE X001TCBCBERRORS Total number of codeblocks received with errors. TE X001TCBCBRECVD Total number of codeblocks received from CIB. TE X001TCBCBREJECT Total number of codeblocks rejected from CIB. TE X001TCBCMDSTAT HCD Command Data Status TE X001TCBCMDSTAT00LLInDec: 1 = loss of lock during CB receive TE X001TCBCMDSTAT01OvrRun: 1 = overrun condition during CB receive TE X001TCBCMDSTAT02DecodeCmd: 1 = HW commands can be received TE X001TCBCMDSTAT03RlyErr: 1 = relay error during CB receive TE X001TCBCMDSTAT04CorrError: 1 = correctable error during CB receive TE X001TCBCMDSTAT05UnCorrError: 1 = uncorrectable error during CB receive TE X001TCBCMDSTAT06HdrwareCmdRcvd: CB was a valid HW command TE X001TCBCMDSTAT07InvldHrdwareCmdRcvd: CB was an invalid HW command TE X001TCBCRC0 HCD/CRC ASIC CRC0 register, bits 7:0 TE X001TCBCRC1 HCD/CRC ASIC CRC1 register, bits 15:8 TE X001TCBCRC2 HCD/CRC ASIC CRC2 register, bits 23:16 TE X001TCBCRCBIT0 HCD CRC Bit 0 TE X001TCBCRCBIT1 HCD CRC Bit 1 TE X001TCBCRCBIT10 HCD CRC Bit 10 TE X001TCBCRCBIT11 HCD CRC Bit 11 TE X001TCBCRCBIT12 HCD CRC Bit 12 TE X001TCBCRCBIT13 HCD CRC Bit 13 TE X001TCBCRCBIT14 HCD CRC Bit 14 TE X001TCBCRCBIT15 HCD CRC Bit 15 TE X001TCBCRCBIT16 HCD CRC Bit 16 TE X001TCBCRCBIT17 HCD CRC Bit 17 TE X001TCBCRCBIT18 HCD CRC Bit 18 TE X001TCBCRCBIT19 HCD CRC Bit 19 TE X001TCBCRCBIT2 HCD CRC Bit 2 TE X001TCBCRCBIT20 HCD CRC Bit 20 TE X001TCBCRCBIT21 HCD CRC Bit 21 TE X001TCBCRCBIT22 HCD CRC Bit 22 TE X001TCBCRCBIT23 HCD CRC Bit 23 TE X001TCBCRCBIT3 HCD CRC Bit 3 TE X001TCBCRCBIT4 HCD CRC Bit 4 TE X001TCBCRCBIT5 HCD CRC Bit 5 TE X001TCBCRCBIT6 HCD CRC Bit 6 TE X001TCBCRCBIT7 HCD CRC Bit 7 TE X001TCBCRCBIT8 HCD CRC Bit 8 TE X001TCBCRCBIT9 HCD CRC Bit 9 TE X001TCBDLCTLGSE Cleared = GSE outputs disabled; set = GSE output inabled TE X001TCBDLCTLHIRTHigh Rate Downlink Rate TE X001TCBDLCTLRATEDownlink Rate Select: 0 = low rate, 1 = high rate TE X001TCBDLCTLRSOLRead-Solomon ASIC Reset. Should aways be 0. TE X001TCBDLCTLSTATDownlink Control and Status Register TE X001TCBDLCTLVCIDSSR Virtual Channel ID TE X001TCBDLFILLPATDownlink Fill Packet Fill Pattern TE X001TCBEFCBIT0 HCD EFCMSK Bit 0 TE X001TCBEFCBIT1 HCD EFCMSK Bit 1 TE X001TCBEFCBIT10 HCD EFCMSK Bit 10 TE X001TCBEFCBIT11 HCD EFCMSK Bit 11 TE X001TCBEFCBIT12 HCD EFCMSK Bit 12 TE X001TCBEFCBIT13 HCD EFCMSK Bit 13 TE X001TCBEFCBIT14 HCD EFCMSK Bit 14 TE X001TCBEFCBIT15 HCD EFCMSK Bit 15 TE X001TCBEFCBIT16 HCD EFCMSK Bit 16 TE X001TCBEFCBIT17 HCD EFCMSK Bit 17 TE X001TCBEFCBIT18 HCD EFCMSK Bit 18 TE X001TCBEFCBIT19 HCD EFCMSK Bit 19 TE X001TCBEFCBIT2 HCD EFCMSK Bit 2 TE X001TCBEFCBIT20 HCD EFCMSK Bit 20 TE X001TCBEFCBIT21 HCD EFCMSK Bit 21 TE X001TCBEFCBIT22 HCD EFCMSK Bit 22 TE X001TCBEFCBIT23 HCD EFCMSK Bit 23 TE X001TCBEFCBIT3 HCD EFCMSK Bit 3 TE X001TCBEFCBIT4 HCD EFCMSK Bit 4 TE X001TCBEFCBIT5 HCD EFCMSK Bit 5 TE X001TCBEFCBIT6 HCD EFCMSK Bit 6 TE X001TCBEFCBIT7 HCD EFCMSK Bit 7 TE X001TCBEFCBIT8 HCD EFCMSK Bit 8 TE X001TCBEFCBIT9 HCD EFCMSK Bit 9 TE X001TCBEFCMSK0 HCD/CRC ASIC EFCMSK0 register, bits 7:0 TE X001TCBEFCMSK1 HCD/CRC ASIC EFCMSK0 register, bits 15:8 TE X001TCBEFCMSK2 HCD/CRC ASIC EFCMSK0 register, bits 23:16 TE X001TCBHCDINT HCD/CRC ASIC HCDINT register TE X001TCBHCDINT0 LLInDecMsk: Interrupt mask for LLInDec TE X001TCBHCDINT1 OvrRunMsk: Intterupt mask for OvrRun condition TE X001TCBHCDINT10 BfErr: Interrupt status for Double Buffer Error condition TE X001TCBHCDINT11 FlagA: Interrupt status for FLAGA TE X001TCBHCDINT12 FlagB: Interrupt status for FLAGB TE X001TCBHCDINT13 HCD HCDINT Bit 13 TE X001TCBHCDINT2 BfErrMsk: Interrupt mask for Double Buffer Error Condition TE X001TCBHCDINT3 RlyErrMsk: Interrupt mask for Relay Overrun Error condition TE X001TCBHCDINT4 FlagAMsk: Interrupt mask for FLAGA TE X001TCBHCDINT5 FlagBMsk: Interrupt mask for FLAGB TE X001TCBHCDINT8 LLInDec: Interrupt status for Loss of Lock in Decode Error TE X001TCBHCDINT9 OvrRun: Interrupt status for Overrun Error Condition TE X001TCBHCDRCVCNTHCD Data Received Counter TE X001TCBHCDSTAT HCD/CRC ASIC HCDSTAT register TE X001TCBHCDSTAT0 LLInDec: 1 = loss of lock while in decode condition TE X001TCBHCDSTAT1 OvrRun: Command buffer overrun TE X001TCBHCDSTAT10EFCRlyBufInUse: 1 = EFC relay holding register is in use. TE X001TCBHCDSTAT11GNDRlyBufInUse: 1 = CRC relay holding register is in use TE X001TCBHCDSTAT12Aside: Set to 1 if this is the ASIDE CDS TE X001TCBHCDSTAT13CCS: Channel Service State: TE X001TCBHCDSTAT2 BFErr: indicates illegal double buffer condition TE X001TCBHCDSTAT3 RlyErr: relay holding register overwrite by EFC/Ground TE X001TCBHCDSTAT8 Lock: Lock signal from the CDU TE X001TCBHCDSTAT9 FlipBit: Polarity from incoming HCD data stream; 0 = inverted TE X001TCBMSCTLAPE HCD APE: Address Parity Error in accessing the HCD ASIC TE X001TCBMSCTLARE HCD ARE: Address Range Error in accessing HCD ASIC TE X001TCBMSCTLBUFATelemetry Buffer A Flag. 0 = SW controlled, 1 = CIB controlledTE X001TCBMSCTLBUFBTelemetry Buffer B Flag. 0 = SW controlled, 1 = CIB controlledTE X001TCBMSCTLCDE HCD CDE: Corrected single bit Data Error in HCD ASIC TE X001TCBMSCTLDINTDownlink Telemetry VME Interrupt Enable TE X001TCBMSCTLDPE HCD DPE: Data Parity Error in writing to HCD ASIC TE X001TCBMSCTLDSTADownlink Telemetry VME Interrupt Status TE X001TCBMSCTLHST HCD ASIC Health Status TE X001TCBMSCTLSP1 Spare 1 Differential Channel Monitor TE X001TCBMSCTLSTATMiscellaneous Control and Status Register TE X001TCBMSCTLUINTUplink HCD Codeblock Received Interrupt Enable TE X001TCBMSCTLUSTAUplink HCD Codeblock Received Interrupt Status TE X001TCBNUMTLMPKANumber of telemetry packets written to buffer A TE X001TCBNUMTLMPKBNumber of telemetry packets written to buffer B TE X001TCBSRCTLEOF SSR End of frame status (Hready Status) TE X001TCBSRCTLSTATSSR Control and Status Register TE X001TCBSRCTLSTRTSSR Start/Stop Control Bit TE X001TCBSRCTLWDECWatchdog Enable Control (1 = Enable) TE X001TCBSYSRSTCNTCIB VME SysReset count (range is 0 to 2) TE X001TCBTCERRORS Total number of telecommand errors received from CIB. TE X001TCBTCRECVD Total number of telecommands received from CIB. TE X001TCBTCREJECT Total number of telecommands rejected from CIB. TE X001TCBULCTLSTATUplink Control and Status Register TE X001TCBUPCTLGSE Clear = GSE uplink disabled; set = GSE uplink enabled TE X001TCBUPCTLLCKAUPL A Channel Lock Status TE X001TCBUPCTLLCKBUPL B Channel Lock Status TE X001TCBUPCTLRACQClear = requires acquisition sequence; set = not required TE X001TCBUPCTLSBERClear = 1 bit error correction; set = 3 bit detection TE X001TCBUPCTLUPSGClear = UPL A signals for commanding; set = UPL B signals TE X001TCBWDTCNTDWNCIB Watchdog 60 second countdown in progress status TE X001TCBWDTCOUNT CIB Watchdog Timer Power Cycle Count TE X001TCBWDTENSTATCIB Watchdog Enable Status TE X001TCBWDTREG CIB Watchdog/SysReset Count Register TE X001TDLENBLEVENTIndicates that stored event messages are enabled for downlink TE X001TDLENBLIDIAGIndicates that stored IDPU Diagnostics are enable for downlinkTE X001TDLENBLSOH Indicates that Stored SOH is enabled to be downlinked TE X001TDLENBLSSR Indicates that stored SSR telemetry is enabled for downlink TE X001TDLENBLTCLOGIndicates that stored telecommand log is enabled for downlink TE X001TDLFLAGBYTE1Downlink Task Flags TE X001TDLNUMEVENT # of Message Event stored tlm frames TE X001TDLNUMIDIAG # of IDPU Diagnostic stored tlm frames TE X001TDLNUMRT Number of real-time telemetry frames queued for downlink TE X001TDLNUMRTHIGHHigh watermark for queued real-time telemetry frames TE X001TDLNUMSOH # of SOH stored tlm frames TE X001TDLNUMSSR # of SSR stored tlm frames TE X001TDLNUMTCLOG # of Telecommand Log stored tlm frames TE X001TDLTCERRORS # of Downlink TCs that failed to execute TE X001TDLTCRECVD # of Downlink TCs received TE X001TDLTCREJECT # of Downlink TCs that failed verification TE X001TDLTXBYPASS The Tx does not need to be on to downlink stored tlm TE X001TDLTXWTEVENTTransmission weight for Message Event TE X001TDLTXWTIDIAGTransmission weight for IDPU Diagnostic TE X001TDLTXWTSOH Transmission weight for SOH TE X001TDLTXWTSSR Transmission weight for SSR TE X001TDLTXWTTCLOGTransmission weight for Telecommand Log TE X001TEVTNORTFRAMIndicates that FSW allocated all real-time telemetry frames TE X001TEVTSSRWOVRDEvent Flag indicates SSR record pointer overtook read pointer TE X001TFMBOOTDEV The current boot device TE X001TFMBOOTTIME Time of current image boot TE X001TFMBOOTTIMEIFSW Boot Time in TIME40 TE X001TFMCURPNVIDXCurrent Fault Management PNVRAM log index TE X001TFMEDACERRCTCount of the number of EDAC error interrupts from PACI TE X001TFMEVENTDAT1Event Messsage Data Field 1 TE X001TFMEVENTDAT2Event Messsage Data Field 2 TE X001TFMEVENTID SOH Event Message ID TE X001TFMEVENTSEC Event Timestamp Seconds TE X001TFMEVENTSUB Event Timestamp Subseconds TE X001TFMEVENTTIMESOH Event Message Timestamp TE X001TFMFLAGBYTE1Fault Protection Flag bits, byte 1 TE X001TFMFLAGBYTE2Fault Management Flag byte 2 TE X001TFMFLAGBYTE3Fault Protection Flag Byte three TE X001TFMHITCRYO Hit CRYO overcurrent condition TE X001TFMHITEDAC At least one PACI EDAC memory error occurred. TE X001TFMHITIDPU Hit IDPU overcurrent condition TE X001TFMHITIDPUH Hit IDPU Heater overcurrent condition TE X001TFMHITIDPUSWHit IDPU Switched overcurrent condition TE X001TFMHITLOBAT1Low BAT1 State of Charge fault response occurred TE X001TFMHITLOBAT2Low BAT2 State of Charge fault response occurred TE X001TFMHITNEB1 Hit NEB1 overcurrent condition TE X001TFMHITNEB2 Hit NEB2 overcurrent condition TE X001TFMHITSUNPT Sun Pointer Error fault response occurred TE X001TFMHITTCLOSSTelecommand loss fault response occurred TE X001TFMLS64HZTCKNumber of times the 64 Hz Bus Tick was lost. TE X001TFMLSACSINT Counts PACI Analog Scan interrupt losses TE X001TFMLSBUSTCK Number of times the 1 Hz Bus Tick was lost. TE X001TFMLSCBINT Counts CIB codeblock interrupt losses TE X001TFMLSDLINT Counts CIB downlink buffer empty interrupt losses TE X001TFMLSIDPUINTCounts PACI IDPU data receive interrupt losses TE X001TFMLSSSRINT Counts PACI SSR data receive interrupt losses TE X001TFMRCV1HZINTCurrently receiving PACI 1 Hz Bus Tick interrupt TE X001TFMRCV8HZINTCurrently receiving PACI 8 Hz Analog Scan interrupt TE X001TFMRCVCBINT Currently receiving CIB Codeblock Received interrupt TE X001TFMRCVCPUINTCurrently receiving CPU 64Hz Interrupt. TE X001TFMRCVPLINT Currently receiving PACI IDPU Data Ready interrupt TE X001TFMRCVSSRINTCurrently receiving PACI SSR Data Ready interrupt TE X001TFMRCVTLMINTCurrently receiving CIB Telemetry Buffer Available intterupt TE X001TFMSBEDACADRCPU Address of last RAD6000 CPU EDAC Single Bit Error TE X001TFMSBEDACNUMNumber of RAD6000 CPU EDAC Single Bit Errors TE X001TFMSECLASTTC# seconds since the last telecommand was accepted TE X001TFMSPCIBINT Spurious CIB interrupts occurred; CIB interrupts disabled TE X001TFMSPPACIINTSpurious PACI interrupts occurred; PACI interrupts disabled TE X001TFMTCERRORS # of Fault Managment TCs that failed to execute TE X001TFMTCRECVD # of Fault Managment TCs received TE X001TFMTCREJECT # of Fault Managment TCs that failed verification TE X001TFMUNKNINTR Counts number of unknown interrupts that occur TE X001TFSWVERSION Flight Software Version TE X001TFSWVERSL1 Flight Software Version Level 1 TE X001TFSWVERSL2 Flight Software Version Level 2 TE X001TFSWVERSL3 Flight Software Version Level 3 TE X001TFSWVERSL4 Flight Software Version Level 4 TE X001TOTTCERRORS Total number of telecommands processed that resulted in errorsTE X001TOTTCRECVD Total number of telecommands processed from all sources. TE X001TOTTCREJECT Total number of telecommands processed that were rejected TE X001TPAA2DGAIN PACI A2D_GAIN_SET Telemetry Channel TE X001TPAAD590CH01FSE TEMP TE X001TPAAD590CH02INERTIA ADJUST DEVICE 1 TEMP TE X001TPAAD590CH03INERTIA ADJUST DEVICE 2 TEMP TE X001TPAAD590CH04SEM CHASSIS TEMP TE X001TPAAD590CH05SEM DC-DC CONV TEMP TE X001TPAAD590CH06SEM PRECISION CLK TEMP TE X001TPAAD590CH07SSR TEMP TE X001TPAAD590CH08TORQ ROD X TEMP TE X001TPAAD590CH09TORQ ROD Y TEMP TE X001TPAAD590CH10TORQ ROD Z TEMP TE X001TPAAD590CH11TRANSPONDER EXT TEMP TE X001TPAAD590CH12DECK MLI TEMP TE X001TPAAD590CH13IDPU TEMP TE X001TPAAD590CH14IPC TEMP TE X001TPAAD590CH15CPC TEMP TE X001TPAAD590CH16SPECTROMETER TEMP TE X001TPAAD590CH17RAS TEMP TE X001TPAAD590CH18AD590 Channel 18 TE X001TPAAD590CH19AD590 Channel 19 TE X001TPAAD590CH20AD590 Channel 20 TE X001TPAAD590CH21AD590 Channel 21 TE X001TPAAD590CH22AD590 Channel 22 TE X001TPAAD590CH23AD590 Channel 23 TE X001TPAAD590CH24AD590 Channel 24 TE X001TPACARLOCK Rcv Carrier Lock Status TE X001TPACMD6_1HZ PACI Command Register 6 - 1 Hz Interrupt Enable TE X001TPACMD6_8HZ PACI Command Register 6 - 8 Hz Interrupt Enable TE X001TPACMD6_EDACPACI Command Register 6 - EDAC Error Interrupt Enable TE X001TPACMD6_ENBLPACI Command Register 6 - Master Enable TE X001TPACMD6_IDPUPACI Command Register 6 - IDPU Data Receive Interrupt Enable TE X001TPACMD6_SSR PACI Command Register 6 - SSR Data Receive Interrupt Enable TE X001TPACMD7_1HZ PACI Command Register 7 - 1 Hz Interrupt TE X001TPACMD7_8HZ PACI Command Register 7 - 8 Hz Interrupt TE X001TPACMD7_CLR PACI Command Register 6 - Master Clear TE X001TPACMD7_EDACPACI Command Register 6 - EDAC Error Interrupt TE X001TPACMD7_IDPUPACI Command Register 6 - IDPU Data Receive Interrupt TE X001TPACMD7_SSR PACI Command Register 6 - SSR Data Receive Interrupt TE X001TPACMDDIGO00Msn Mode Relay Select Cmd TE X001TPACMDDIGO01Msn Mode Relay State Cmd TE X001TPACMDDIGO02Msn Mode Relay Chg Enable Cmd TE X001TPACMDDIGO03PACI Digital Output Bit 3 TE X001TPACMDDIGO04PACI Digital Output Bit 4 TE X001TPACMDDIGO05PACI Digital Output Bit 5 TE X001TPACMDDIGO06PACI Digital Output Bit 6 TE X001TPACMDDIGO07PACI Digital Output Bit 7 TE X001TPACMDDIGO08PACI Digital Output Bit 8 TE X001TPACMDDIGO09PACI Digital Output Bit 9 TE X001TPACMDDIGO10PACI Digital Output Bit 10 TE X001TPACMDDIGO11PACI Digital Output Bit 11 TE X001TPACMDDIGO12PACI Digital Output Bit 12 TE X001TPACMDDIGO13PACI Digital Output Bit 13 TE X001TPACMDDIGO14PACI Digital Output Bit 14 TE X001TPACMDDIGO15PACI Digital Output Bit 15 TE X001TPACMDDIGOUTLast commanded PACI Digital Output Word TE X001TPACSSCH1 Coarse Sun Sensor Channel 1 TE X001TPACSSCH2 Coarse Sun Sensor Channel 2 TE X001TPACSSCH3 Coarse Sun Sensor Channel 3 TE X001TPACSSCH4 Coarse Sun Sensor Channel 4 TE X001TPACSSCH5 Coarse Sun Sensor Channel 5 TE X001TPACSSCH6 Coarse Sun Sensor Channel 6 TE X001TPACSSCH7 Coarse Sun Sensor Channel 7 TE X001TPACSSCH8 Coarse Sun Sensor Channel 8 TE X001TPADIN16TO31Digital Input Channels 15 to 31 TE X001TPADIN1TO15 Digital Input Channels 0 to 15 TE X001TPADINBIT00 CCB BATT TEMP A/B SEL STAT TE X001TPADINBIT01 CPU PWR STATUS TE X001TPADINBIT02 PCB UNDERVOLTAGE TRIP STATUS TE X001TPADINBIT03 PCB OVERCURRENT TRIP STATUS TE X001TPADINBIT04 PCB IDPU POWER STATUS TE X001TPADINBIT05 CCB MISSION MODE STATUS 1 TE X001TPADINBIT06 CCB MISSION MODE STATUS 2 TE X001TPADINBIT07 PACI Digital Input Bit 07 TE X001TPADINBIT08 PACI Digital Input Bit 08 TE X001TPADINBIT09 PACI Digital Input Bit 09 TE X001TPADINBIT10 PACI Digital Input Bit 10 TE X001TPADINBIT11 PACI Digital Input Bit 11 TE X001TPADINBIT12 PACI Digital Input Bit 12 TE X001TPADINBIT13 PACI Digital Input Bit 13 TE X001TPADINBIT14 PACI Digital Input Bit 14 TE X001TPADINBIT15 PACI Digital Input Bit 15 TE X001TPADINBIT16 SSR COMMAND READY STATUS TE X001TPADINBIT17 FSS SUN PRENSENCE TE X001TPADINBIT18 RCV CARRIER LOCK STATUS TE X001TPADINBIT19 RCV SUB-CARRIER LOCK STATUS TE X001TPADINBIT20 XMT ON/OFF STATUS TE X001TPADINBIT21 XMIT SWITCH POSITION STATUS TE X001TPADINBIT22 LV SEP SENSE 1 TE X001TPADINBIT23 LV SEP SENSE 2 TE X001TPADINBIT24 LV SEP SENSE 3 TE X001TPADINBIT25 PACI Digital Input Bit 25 TE X001TPADINBIT26 PACI Digital Input Bit 26 TE X001TPADINBIT27 PACI Digital Input Bit 27 TE X001TPADINBIT28 PACI Digital Input Bit 28 TE X001TPADINBIT29 PACI Digital Input Bit 29 TE X001TPADINBIT30 PACI Digital Input Bit 30 TE X001TPADINBIT31 PACI Digital Input Bit 31 TE X001TPAFSSCOSIN1Fine Sun Sensor Cosine 1 TE X001TPAFSSCOSIN2Fine Sun Sensor Cosine 2 TE X001TPAFSSDIG1 Fine Sun Sensor Digital 1 TE X001TPAFSSDIG2 Fine Sun Sensor Digital 2 TE X001TPAFSSSIN1 Fine Sun Sensor Sine 1 TE X001TPAFSSSIN2 Fine Sun Sensor Sine 2 TE X001TPAGPACH03 BAT PRESS 1 TE X001TPAGPACH04 BAT PRESS 2 TE X001TPAGPACH05 MAG X OUTPUT TE X001TPAGPACH06 MAG Z OUTPUT TE X001TPAGPACH07 MAG Y OUTPUT TE X001TPAGPACH08 RCV CARRIER LOOP STRESS TE X001TPAGPACH09 RCV SIGNAL STRENGTH TE X001TPAGPACH10 XMT CONVERTER VOLTAGE TE X001TPAGPACH11 XMT PWR AMP TEMP TE X001TPAGPACH12 XMT PWR SPLY TEMP TE X001TPAGPACH13 XMT RF OUTPUT PWR TE X001TPAGPACH14 MAGNETOMETER TEMP TE X001TPAGPACH15 FSE SOH MONITOR TE X001TPAGPACH16 SSR +5V SOH TE X001TPAGPACH17 SSR +3.3V SOH TE X001TPAGPACH18 ESSENTIAL +5V MONITOR TE X001TPAGPACH19 CPU +5V MONITOR TE X001TPAGPACH20 TORQ ROD Z RED CURR TE X001TPAGPACH21 BAT CURRENT TE X001TPAGPACH22 BAT MID VOLTAGE TE X001TPAGPACH23 BAT TEMP 1 TE X001TPAGPACH24 BAT TEMP 2 TE X001TPAGPACH25 BAT VOLTAGE TE X001TPAGPACH26 CCB TRANSISTORS ON TE X001TPAGPACH27 SOLAR ARRAY CURRENT TE X001TPAGPACH28 VT CURVE SELECTED TE X001TPAGPACH29 ESSENTIAL BUS CURRENT TE X001TPAGPACH30 ESSENTIAL +15V MONITOR TE X001TPAGPACH31 NEB1 BUS CURRENT TE X001TPAGPACH32 IDPU HEATER BUS CURRENT TE X001TPAGPACH33 NEB2 BUS CURRENT TE X001TPAGPACH34 IDPU CURRENT TE X001TPAGPACH35 CRYO CURRENT TE X001TPAGPACH36 IDPU SWITCHED LOADS CURRENT TE X001TPAGPACH37 TORQ ROD X CURRENT TE X001TPAGPACH38 TORQ ROD Y CURRENT TE X001TPAGPACH39 TORQ ROD Z PRI CURR TE X001TPAGPACH40 ESSENTIAL +15V MONITOR TE X001TPAMATTSTSINMATT_STS_IN field in SOH TE X001TPAPRTCH1 BAT CHASSIS TEMP TE X001TPAPRTCH2 SOLAR WING 1 FRONT TEMP TE X001TPAPRTCH3 SOLAR WING 2 FRONT TEMP TE X001TPAPRTCH4 SOLAR WING 3 FRONT TEMP TE X001TPAPRTCH5 SOLAR WING 4 FRONT TEMP TE X001TPAPRTCH6 IAD 1 POSITION TE X001TPAPRTCH7 IAD 2 POSITION TE X001TPAPRTCH8 Spare TE X001TPAREGCMD6 PACI Command Register 6 TE X001TPAREGCMD7 PACI Command Register 7 TE X001TPAREGSTAT1 PACI Status Register 1 TE X001TPAREGSTAT2 PACI Status Register 2 TE X001TPARXSIGPWR Receiver Signal Strength TE X001TPARXSIGSTRSReceiver Carrier Loop Stress TE X001TPASTA1_ICLKPACI Status Register 1 - PACI using internal 4 MHz clock TE X001TPASTA1_PLRXPACI Status Register 1 - Done receiving IDPU telemetry data TE X001TPASTA1_PLTXPACI Status Register 1 - Done transmitting IDPU command data TE X001TPASTA1_SOH PACI Status Register 1 - SOH Scan Completed TE X001TPASTA1_SSRXPACI Status Register 1 - Done receiving SSR telemetry data TE X001TPASTA1_SSTXPACI Status Register 1 - Done transmitting SSR telemetry data TE X001TPASTA2_PERRPACI Status Register 2 - IDPU Parity Error detected TE X001TPASTA2_SEU PACI Status Register 2 - SEU upset detected TE X001TPASUBCARLOCRcv Carrier Lock Status TE X001TPCADBSAPDISADB SAPDIS Register TE X001TPCADBSASTATADB SASTAT Register TE X001TPCADBSTCNT ADB STEPCNT Register TE X001TPCADBSTCNTLADB STEPCNTL Register TE X001TPCBCNTL PCB Board's PCBCNTL Register TE X001TPCBCTL_LUV1PCBCNTL LUV1: Latched Under Voltage #1 output TE X001TPCBCTL_LUV2PCBCNTL LUV2: Latched Under Voltage #2 output TE X001TPCBCTL_LUV3PCBCNTL LUV3: Latched Under Voltage #3 output TE X001TPCBCTL_OCCRIndicates that CRYO Over Current or LUV2 occurred TE X001TPCBCTL_OCI2Indicates that IDPU28 Over Current or LUV2 occurred TE X001TPCBCTL_OCIDIndicates that IDPU Over Current or LUV2 occurred TE X001TPCBCTL_OCIHIndicates that IDPUH Over Current or LUV2 occurred TE X001TPCBCTL_OCN1Indicates that NEB1 Over Current event or LUV2 occurred TE X001TPCBCTL_OCN2Indicates that NEB2 Over Current or LUV2 occurred TE X001TPCBCTL_UV1 PCBCNTL UV1: Raw Under Voltage #1 input TE X001TPCBCTL_UV2 PCBCNTL UV2: Raw Under Voltage #2 input TE X001TPCBCTL_UV3 PCBCNTL UV3: Raw Under Voltage #3 input TE X001TPCBCTL_UVENPCBCNTL UVEN: Under Voltage Enable TE X001TPCBCTL_UVS1When set, degrades the UV1 trip level. (clear = nominal) TE X001TPCBCTL_UVS2When set, degrades the UV2 trip level. (clear = nominal) TE X001TPCBCTL_UVS3When set, degrades the UV3 trip level. (clear = nominal) TE X001TPCBS1_CRYO PCBSTA1 CYRO_ST: Cryocooler Power Status TE X001TPCBS1_IDP28PCBSTA1 IDPU28_ST: IDPU Switched 28V Power Bus Status TE X001TPCBS1_IDPU PCBSTA1 IDPU_ST: IDPU Power Bus Status TE X001TPCBS1_IDPUHPCBSTA1 IDPUH_ST: IDPU Heater Bus Status TE X001TPCBS1_NEB1 PCBSTA1 NEB1_ST: Non-essential Bus #1 Bus Status TE X001TPCBS1_NEB2 PCBSTA1 NEB2_ST: Non-essential Bus #2 Bus Status TE X001TPCBS1_SSR PCBSTA1 SSR_ST: Solid State Recorder Power Bus Status TE X001TPCBS2_BATH1PCBSTA2 BATHT1: Battery Heater #1 Status TE X001TPCBS2_BATH2PCBSTA2 BATHTR2: Battery Heater #2 Status TE X001TPCBS2_FSS PCBSTA2 FSS_ST: Fine Sun Sensor Electronics Power Bus Status TE X001TPCBS2_FSSHTPCBSTA2 FSSHTR_ST: Fine Sun Sensor Heater Status TE X001TPCBS2_IAD1 PCBSTA2 IAD1_ST: Inerial Adjustment Device 1 (IAD1) Status TE X001TPCBS2_IAD2 PCBSTA2 IAD2_ST: Inerial Adjustment Device 2 (IAD2) Status TE X001TPCBS2_SADHTPCBSTA2 SADHTR_ST: Inertia Adjustment Device Heater Status TE X001TPCBS2_SEMHTPCBSTA2 SEMHTR_ST: Spacecraft Electronics Module Heater StatusTE X001TPCBS2_SPAR1PCBSTA2 SPARE1: Spare #1 Power Bus Status TE X001TPCBS2_SPAR2PCBSTA2 SPARE2: Spare #2 Power Bus Status TE X001TPCBS2_SSRHTPCBSTA2 SSRHTR_ST: Solid State Recorder Heater Status TE X001TPCBS2_TQHTRPCBSTA2 TQHTR_ST: Torque Rod Heater Status TE X001TPCBS2_XMIT PCBSTA2 XMIT_ST: Transmitter Power Bus Status TE X001TPCBS2_XPHTRPCBSTA2 XPHTR_ST: Transponder Heater Status TE X001TPCBS2_XTQ PCBSTA2 XTQ_ST: X-axis torque rod power status TE X001TPCBS2_YTQ PCBSTA2 YTQ_ST: Y-axis torque rod power status TE X001TPCBSTA1 PCB Board's PCBSTA1 Register (Primary Bus Status Bits) TE X001TPCBSTA2 PCB Board's PCBSTA2 Register (Secondary Bus Status Bits) TE X001TPCBTRQCMDX Last commanded Torque Rod X count TE X001TPCBTRQCMDY Last commanded Torque Rod Y count TE X001TPCBTRQCMDZ1Last commanded primary Torque Rod Z count TE X001TPCBTRQCMDZ2Last commanded redundant Torque Rod Z count TE X001TPCTCERRORS # of PCB Task TCs that failed to execute TE X001TPCTCRECVD # of PCB Task TCs received TE X001TPCTCREJECT # of PCB Task TCs that failed verification TE X001TPCTXSWENBL The Transmitter Power Switch is enable to be turned on TE X001TPLCMDACS IDPU Command - Status Segment - ACS TE X001TPLCMDPOWER IDPU Command - Status Segment - Power TE X001TPLCMDRECVD IDPU Command - Total number of TCs received TE X001TPLCMDREJECTDPU Command - Total number of TCs rejected TE X001TPLCMDSENT IDPU Command - Number of payload TCs last sent TE X001TPLCMDSSR IDPU Command - Status Segment - SSR TE X001TPLCMDTC IDPU Command - Status Segment - TC TE X001TPLCMDTIME IDPU Command - Status Segment - Time TE X001TPLSASSEGMNTIDPU Low Speed Telemetry SAS Segment TE X001TPLSASSEGX1 Payload SAS Segment - X1 count TE X001TPLSASSEGX2 Payload SAS Segment - X2 count TE X001TPLSASSEGX3 Payload SAS Segment - X3 count TE X001TPLSASSEGX4 Payload SAS Segment - X4 count TE X001TPLSASSEGX5 Payload SAS Segment - X5 count TE X001TPLSASSEGX6 Payload SAS Segment - X6 count TE X001TPLSASSEGX7 Payload SAS Segment - X7 count TE X001TPLSASSEGX8 Payload SAS Segment - X8 count TE X001TPLSASSEGY1 Payload SAS Segment - Y1 count TE X001TPLSASSEGY2 Payload SAS Segment - Y2 count TE X001TPLSASSEGY3 Payload SAS Segment - Y3 count TE X001TPLSASSEGY4 Payload SAS Segment - Y4 count TE X001TPLSASSEGY5 Payload SAS Segment - Y5 count TE X001TPLSASSEGY6 Payload SAS Segment - Y6 count TE X001TPLSASSEGY7 Payload SAS Segment - Y7 count TE X001TPLSASSEGY8 Payload SAS Segment - Y8 count TE X001TPLSOHSEGMNTIDPU Low Speed Telemetry SOH Segment TE X001TPLTCERRORS # of IDPU Task TCs that failed to execute TE X001TPLTCRECVD # of IDPU Task TCs received TE X001TPLTCREJECT # of IDPU Task TCs that failed verification TE X001TPLTLMRCTIMETime when the IDPU telemetry was received TE X001TSCATSAVSTTSActivation state of the ATS. Active=1 or Idle=0 TE X001TSCATSERRORSTotal of all ATS stored telecommands that failed to route TE X001TSCATSLICDIXIndex of the last invalid ATS stored telecommand TE X001TSCATSLICDRIID of the ATS containing the last invalid ATS stored TC TE X001TSCATSLICDSTStatus of the last invalid ATS stored telecommand TE X001TSCATSLICDTSTimestamp of the last invalid ATS stored telecommand TE X001TSCATSNTCDIXIndex of the next stored telecommand to execute in the ATS TE X001TSCATSNTCDTSTimestamp of the next stored telecommand to execute in the ATSTE X001TSCATSPAVSSIID of the current or previously active ATS TE X001TSCATSRECVD Total of all ATS stored telecommands processed TE X001TSCATSREJECTTotal of all ATS stored telecommands that failed verification TE X001TSCATSSWCHPGATS Switch is pending state TE X001TSCATSVRFYIDID of the last ATS table verified TE X001TSCATSVRFYSTState of last ATS table verification (1=pass, 0=failed) TE X001TSCRTS00ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS01ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS02ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS03ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS04ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS05ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS06ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS07ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS08ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS09ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS10ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS11ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS12ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS13ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS14ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS15ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS16ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS17ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS18ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS19ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS20ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS21ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS22ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS23ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS24ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS25ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS26ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS27ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS28ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS29ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS30ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS31ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS32ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS33ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS34ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS35ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS36ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS37ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS38ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS39ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS40ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS41ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS42ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS43ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS44ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS45ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS46ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS47ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS48ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS49ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS50ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS51ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS52ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS53ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS54ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS55ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS56ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS57ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS58ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS59ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS60ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS61ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS62ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTS63ENABEnabled-Disabled State of RTS (1=enabled, 0=disabled) TE X001TSCRTSELAP00Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP01Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP02Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP03Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP04Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP05Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP06Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP07Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP08Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP09Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP10Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP11Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP12Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP13Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP14Elapsed time in seconds since the RTS was started. TE X001TSCRTSELAP15Elapsed time in seconds since the RTS was started. TE X001TSCRTSERRORSTotal of all RTS stored telecommands that failed to route TE X001TSCRTSID00 ID of the Active or Suspended RTS 00 TE X001TSCRTSID01 ID of the Active or Suspended RTS 01 TE X001TSCRTSID02 ID of the Active or Suspended RTS 02 TE X001TSCRTSID03 ID of the Active or Suspended RTS 03 TE X001TSCRTSID04 ID of the Active or Suspended RTS 04 TE X001TSCRTSID05 ID of the Active or Suspended RTS 05 TE X001TSCRTSID06 ID of the Active or Suspended RTS 06 TE X001TSCRTSID07 ID of the Active or Suspended RTS 07 TE X001TSCRTSID08 ID of the Active or Suspended RTS 08 TE X001TSCRTSID09 ID of the Active or Suspended RTS 09 TE X001TSCRTSID10 ID of the Active or Suspended RTS 10 TE X001TSCRTSID11 ID of the Active or Suspended RTS 11 TE X001TSCRTSID12 ID of the Active or Suspended RTS 12 TE X001TSCRTSID13 ID of the Active or Suspended RTS 13 TE X001TSCRTSID14 ID of the Active or Suspended RTS 14 TE X001TSCRTSID15 ID of the Active or Suspended RTS 15 TE X001TSCRTSLICDIXIndex of the last invalid RTS stored telecommand. TE X001TSCRTSLICDRIID of the RTS containing the last invalid RTS stored TC TE X001TSCRTSLICDSTStatus of the last invalid RTS stored telecommand TE X001TSCRTSLICDTSTimestamp of the last invalid RTS stored telecommand. TE X001TSCRTSNRACTHHigh-Water mark for number of active-suspended RTSs TE X001TSCRTSNRACTVNumber of active-suspended RTSs TE X001TSCRTSNXTI00Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI01Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI02Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI03Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI04Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI05Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI06Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI07Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI08Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI09Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI10Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI11Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI12Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI13Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI14Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSNXTI15Index of the next stored telecommand to execute in the RTS. TE X001TSCRTSRECVD Total of all RTS stored telecommands processed TE X001TSCRTSREJECTTotal of all RTS stored telecommands that failed verification TE X001TSCRTSSTTS00State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS01State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS02State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS03State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS04State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS05State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS06State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS07State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS08State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS09State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS10State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS11State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS12State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS13State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS14State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSSTTS15State of the RTS. 1=Active, 0=Suspended TE X001TSCRTSVRFYIDID of the last RTS table verified TE X001TSCRTSVRFYSTState of last ATS table verification (1=pass, 0=failed) TE X001TSCTCERRORS # of Command Processor TCs that failed to execute TE X001TSCTCRECVD # of Command Processor TCs received TE X001TSCTCREJECT # of Command Processor TCs that failed verification TE X001TSMATSSTAMPACreation Timestamp of ATS Table A TE X001TSMATSSTAMPBCreation Timestamp of ATS Table B TE X001TSMATSSTMPAICreation Timestamp of ATS Table A (TIME40) TE X001TSMATSSTMPBICreation Timestamp of ATS Table B (TIME40) TE X001TSMBYTESREMNNumber of bytes remaining to dump TE X001TSMCOPIES # of copies of dump to transmit. TE X001TSMCOPYLOC Destination address of memory copy TE X001TSMCPYREMAIN# of remaining copies to dump. TE X001TSMDESTTYPE Table/memory operations destination type. TE X001TSMEEP1FSWR Indicates that the EEPROM1 Filesystem is enabled for writing TE X001TSMEEP2FSWR Indicates that the EEPROM2 Filesystem is enabled for writing TE X001TSMLSTOPSTATLast table/memory operations status. TE X001TSMMCPYRECVD# of SMMEMCOPY commands received TE X001TSMMCPYREJCT# of SMMEMCOPY commands rejected TE X001TSMMLDRECVD # of SMMEMLOAD commands received TE X001TSMMLDREJCT # of SMMEMLOAD commands rejected TE X001TSMNUMBYTES Number of bytes to dump. TE X001TSMOPSTATUS Table/memory operations status. TE X001TSMSELTBLSIZSize of the currently selected table TE X001TSMSRCTYPE Table/memory operations source type. TE X001TSMSTARTLOC Starting location of load/copy/dump (address/offset) TE X001TSMTBLID Table ID currently selected. TE X001TSMTBLLOADEDA boolean indicating the loaded/not loaded state of each tableTE X001TSMTBLNUM000Indicates whether table 000 has been loaded TE X001TSMTBLNUM001Indicates whether table 001 has been loaded TE X001TSMTBLNUM002Indicates whether table 002 has been loaded TE X001TSMTBLNUM003Indicates whether table 003 has been loaded TE X001TSMTBLNUM004Indicates whether table 004 has been loaded TE X001TSMTBLNUM005Indicates whether table 005 has been loaded TE X001TSMTBLNUM006Indicates whether table 006 has been loaded TE X001TSMTBLNUM007Indicates whether table 007 has been loaded TE X001TSMTBLNUM008Indicates whether table 008 has been loaded TE X001TSMTBLNUM009Indicates whether table 009 has been loaded TE X001TSMTBLNUM010Indicates whether table 010 has been loaded TE X001TSMTBLNUM011Indicates whether table 011 has been loaded TE X001TSMTBLNUM012Indicates whether table 012 has been loaded TE X001TSMTBLNUM013Indicates whether table 013 has been loaded TE X001TSMTBLNUM014Indicates whether table 014 has been loaded TE X001TSMTBLNUM015Indicates whether table 015 has been loaded TE X001TSMTBLNUM016Indicates whether table 016 has been loaded TE X001TSMTBLNUM017Indicates whether table 017 has been loaded TE X001TSMTBLNUM018Indicates whether table 018 has been loaded TE X001TSMTBLNUM019Indicates whether table 019 has been loaded TE X001TSMTBLNUM020Indicates whether table 020 has been loaded TE X001TSMTBLNUM021Indicates whether table 021 has been loaded TE X001TSMTBLNUM022Indicates whether table 022 has been loaded TE X001TSMTBLNUM023Indicates whether table 023 has been loaded TE X001TSMTBLNUM024Indicates whether table 024 has been loaded TE X001TSMTBLNUM025Indicates whether table 025 has been loaded TE X001TSMTBLNUM026Indicates whether table 026 has been loaded TE X001TSMTBLNUM027Indicates whether table 027 has been loaded TE X001TSMTBLNUM028Indicates whether table 028 has been loaded TE X001TSMTBLNUM029Indicates whether table 029 has been loaded TE X001TSMTBLNUM030Indicates whether table 030 has been loaded TE X001TSMTBLNUM031Indicates whether table 031 has been loaded TE X001TSMTBLNUM032Indicates whether table 032 has been loaded TE X001TSMTBLNUM033Indicates whether table 033 has been loaded TE X001TSMTBLNUM034Indicates whether table 034 has been loaded TE X001TSMTBLNUM035Indicates whether table 035 has been loaded TE X001TSMTBLNUM036Indicates whether table 036 has been loaded TE X001TSMTBLNUM037Indicates whether table 037 has been loaded TE X001TSMTBLNUM038Indicates whether table 038 has been loaded TE X001TSMTBLNUM039Indicates whether table 039 has been loaded TE X001TSMTBLNUM040Indicates whether table 040 has been loaded TE X001TSMTBLNUM041Indicates whether table 041 has been loaded TE X001TSMTBLNUM042Indicates whether table 042 has been loaded TE X001TSMTBLNUM043Indicates whether table 043 has been loaded TE X001TSMTBLNUM044Indicates whether table 044 has been loaded TE X001TSMTBLNUM045Indicates whether table 045 has been loaded TE X001TSMTBLNUM046Indicates whether table 046 has been loaded TE X001TSMTBLNUM047Indicates whether table 047 has been loaded TE X001TSMTBLNUM048Indicates whether table 048 has been loaded TE X001TSMTBLNUM049Indicates whether table 059 has been loaded TE X001TSMTBLNUM050Indicates whether table 050 has been loaded TE X001TSMTBLNUM051Indicates whether table 051 has been loaded TE X001TSMTBLNUM052Indicates whether table 052 has been loaded TE X001TSMTBLNUM053Indicates whether table 053 has been loaded TE X001TSMTBLNUM054Indicates whether table 054 has been loaded TE X001TSMTBLNUM055Indicates whether table 055 has been loaded TE X001TSMTBLNUM056Indicates whether table 056 has been loaded TE X001TSMTBLNUM057Indicates whether table 057 has been loaded TE X001TSMTBLNUM058Indicates whether table 058 has been loaded TE X001TSMTBLNUM059Indicates whether table 069 has been loaded TE X001TSMTBLNUM060Indicates whether table 060 has been loaded TE X001TSMTBLNUM061Indicates whether table 061 has been loaded TE X001TSMTBLNUM062Indicates whether table 062 has been loaded TE X001TSMTBLNUM063Indicates whether table 063 has been loaded TE X001TSMTBLNUM064Indicates whether table 064 has been loaded TE X001TSMTBLNUM065Indicates whether table 065 has been loaded TE X001TSMTBLNUM066Indicates whether table 066 has been loaded TE X001TSMTBLNUM067Indicates whether table 067 has been loaded TE X001TSMTBLNUM068Indicates whether table 068 has been loaded TE X001TSMTBLNUM069Indicates whether table 079 has been loaded TE X001TSMTBLNUM070Indicates whether table 070 has been loaded TE X001TSMTBLNUM071Indicates whether table 071 has been loaded TE X001TSMTBLNUM072Indicates whether table 072 has been loaded TE X001TSMTBLNUM073Indicates whether table 073 has been loaded TE X001TSMTBLNUM074Indicates whether table 074 has been loaded TE X001TSMTBLNUM075Indicates whether table 075 has been loaded TE X001TSMTBLNUM076Indicates whether table 076 has been loaded TE X001TSMTBLNUM077Indicates whether table 077 has been loaded TE X001TSMTBLNUM078Indicates whether table 078 has been loaded TE X001TSMTBLNUM079Indicates whether table 079 has been loaded TE X001TSMTBLNUM080Indicates whether table 080 has been loaded TE X001TSMTBLNUM081Indicates whether table 081 has been loaded TE X001TSMTBLNUM082Indicates whether table 082 has been loaded TE X001TSMTBLNUM083Indicates whether table 083 has been loaded TE X001TSMTBLNUM084Indicates whether table 084 has been loaded TE X001TSMTBLNUM085Indicates whether table 085 has been loaded TE X001TSMTBLNUM086Indicates whether table 086 has been loaded TE X001TSMTBLNUM087Indicates whether table 087 has been loaded TE X001TSMTBLNUM088Indicates whether table 088 has been loaded TE X001TSMTBLNUM089Indicates whether table 089 has been loaded TE X001TSMTBLNUM090Indicates whether table 090 has been loaded TE X001TSMTBLNUM091Indicates whether table 091 has been loaded TE X001TSMTBLNUM092Indicates whether table 092 has been loaded TE X001TSMTBLNUM093Indicates whether table 093 has been loaded TE X001TSMTBLNUM094Indicates whether table 094 has been loaded TE X001TSMTBLNUM095Indicates whether table 095 has been loaded TE X001TSMTBLNUM096Indicates whether table 096 has been loaded TE X001TSMTBLNUM097Indicates whether table 097 has been loaded TE X001TSMTBLNUM098Indicates whether table 098 has been loaded TE X001TSMTBLNUM099Indicates whether table 099 has been loaded TE X001TSMTBLNUM100Indicates whether table 100 has been loaded TE X001TSMTBLNUM101Indicates whether table 101 has been loaded TE X001TSMTBLNUM102Indicates whether table 102 has been loaded TE X001TSMTBLNUM103Indicates whether table 103 has been loaded TE X001TSMTCERRORS # of Storage Manager TCs that failed to execute TE X001TSMTCMTRECVD# of SMTBLCOMMIT commands received TE X001TSMTCMTREJCT# of SMTBLCOMMIT commands rejected TE X001TSMTCRECVD # of Storage Manager TCs received TE X001TSMTCREJECT # of Storage Manager TCs that failed verification TE X001TSMTLDRECVD # of SMTBLLOAD commands received TE X001TSMTLDREJCT # of SMTBLLOAD commands rejected TE X001TSNACTCNTLBDSSR Device Active Control Board TE X001TSNACTDCDC SSR Device Active DC/DC Converter TE X001TSNACTMEMBUSSSR Device Active Memory Bus TE X001TSNBITABORT SSR Device Last BIT Aborted TE X001TSNBITFAILEDSSR Device One or More BIT Tests Failed TE X001TSNBITING SSR Device BIT in Progress TE X001TSNCMDCOUNT SSR Device Command Count TE X001TSNCMDID SSR Device Command ID TE X001TSNCNTSRAMERSSR Device Counting Errors in SRAM TE X001TSNDADAFIFO0SSR Device DADA 0 FIFO Test Results TE X001TSNDADAFIFO1SSR Device DADA 1 FIFO Test Results TE X001TSNDADAREGT0SSR Device DADA 0 Registers Test Result TE X001TSNDADAREGT1SSR Device DADA 1 Registers Test Result TE X001TSNDRAMPWRSTSSR Device DRAM Board Power Status TE X001TSNEDACRESLTSSR Device DRAM EDAC Test Results TE X001TSNEDCERBDIDSSR Device EDAC Error Board ID TE X001TSNEXCEPTADRSSR Device Exception Address TE X001TSNEXECROM SSR Device Executing ROM Firmware TE X001TSNFPGAREGTRSSR Device FPGA Registers Test Result TE X001TSNHRDERRCNTSSR Device Hard Error Count TE X001TSNLSTCMDID SSR Device Last Command ID TE X001TSNLSTCMDOP SSR Device Last Command Opcode TE X001TSNLSTRTNCD SSR Device Last Return Code TE X001TSNMAMAFAIL SSR Device MAMA Failed TE X001TSNMAMAREGTRSSR Device MAMA Registers Test Result TE X001TSNMBUSREGF SSR Device MBUS Registers Both Failed TE X001TSNMBUSSEL SSR Device MBUS Selected TE X001TSNMEMTSTRESSSR Device Memory Test Results TE X001TSNNEEDRCFG SSR Device Reconfigure Memory Needed TE X001TSNNUMPRCRSTSSR Device Number of Process Resets TE X001TSNPLAYING SSR Device Playback in progress TE X001TSNPNDMMAPADSSR Device Pending Memory Map Address TE X001TSNRECFGING SSR Device Reconfigure in Progress TE X001TSNRECRDING SSR Device Record in progress TE X001TSNREFSHRATESSR Device Current Refresh Rate TE X001TSNREMAPBCNTSSR Device Remap Block Count TE X001TSNRETCODE SSR Device Return Code TE X001TSNSCRUBDIEDSSR Device Scrub Died Board ID TE X001TSNSCRUBRATESSR Device Current Scrub Rate TE X001TSNSFTERRCNTSSR Device Soft Error Count TE X001TSNSRAMCHKT SSR Device SRAM Checksum Test Results TE X001TSNSRAMEDAC SSR Device SRAM EDAC Test Results TE X001TSNSRAMIOTS SSR Device SRAM I/O Test Results TE X001TSNSRDBLBITCSSR Device SRAM Double Bit Error Count TE X001TSNSRSGLBITCSSR Device SRAM Single Bit Error Count TE X001TSNTOTMEM SSR Device Total Good Memory TE X001TSNTOTUNALOCSSR Device Total Unallocated Memory TE X001TSNUNFIXERRSSSR Device Unfixable Error Count TE X001TSNWDTSTRES SSR Device Watchdog Test Results TE X001TSNWTDTIMOUTSSR Device Watchdog Timed Out TE X001TSOTCERRORS # of SOH Task TCs that failed to execute TE X001TSOTCRECVD # of SOH Task TCs received TE X001TSOTCREJECT # of SOH Task TCs that failed verification TE X001TSSCRSPCMDIDSSR command response telemetry command Id. TE X001TSSCRSPRTNCDSSR command response telemetry return code. TE X001TSSCURRDPTR Row Offset of read pointer from SSR Pointer Status TE X001TSSCURWRTPTRRow Offset of write pointer from SSR Pointer Status TE X001TSSFLAGBYTE1Various SSR Task Flags TE X001TSSLSTRDPTR Last stored science playback position TE X001TSSLSTWRTPTRLast stored science record positiion TE X001TSSNHRTBEAT Indicates receiving 1Hz SSR Normal Telemetry TE X001TSSPHRTBEAT Indicates receiving 1 Hz SSR Pointer Status TE X001TSSR1HZPRCENSSR 1Hz processing is enabled TE X001TSSRCMDRSPENSSR Command Response telemetry enabled TE X001TSSRCRDINPRGIndicates that FSW received record TC; reset on stop record TCTE X001TSSRDPRTIPRGIndicates that an SSR Data Port Reset Operation is in progressTE X001TSSRDPTRVLD Indicates whether TSSLSTRDPTR is valid (1 = valid) TE X001TSSREDACBYPSIndicates EDAC bypass during playback was commanded TE X001TSSRNRMLTLM SSR normal telemetry. TE X001TSSRTMSCIPRGReal-time IDPU science data playback in progress. TE X001TSSSTDSCIPRGStored IDPU science data playback in progress. TE X001TSSTCERRORS # of SSR Task TCs that failed to execute TE X001TSSTCRECVD # of SSR Task TCs received TE X001TSSTCREJECT # of SSR Task TCs that failed verification TE X001TSSWRTPTRVLDIndicates whether TSSLSTWRTPTR is valid (1 = valid) TE X001TUPTCERRORS # of Uplink Task TCs that failed to execute. TE X001TUPTCRECVD # of Uplink Task TCs received. TE X001TUPTCREJECT # of Uplink Task TCs that failed verification. TE